The project focuses on the definition of a formal framework based on a tight integration of design and verification through all refinement steps of an embedded platform design flow, from specifications to logic synthesis and software compilation. In particular, it is intended to propose a modelling and verification flow to enhance and speed-up embedded platform design and configuration with particular regard to application fields related to mixed continuous/discrete models, like for example networked multimedia and sensor network managing.

In this context, the main activities will be related to the definition of innovative methodologies and tools to:

  • define and validate properties that represent the design specification;
  • automatically synthesize properties into code;
  • map models between hybrid and discrete domains;
  • provide correct-by-construction abstraction/refinement processes;
  • perform post-refinement verification.

Such activities will be implemented in a set of tools working on more that one abstraction level whose correctness will be formally proved. The reference platform to apply and validate the COCONUT flow will be FAUST with a couple of software defined radio applications.

General Info:

Start Date: 9 Aug 2013


  • University of Verona
  • AerieLogic
  • Certess S.A.
  • Fondazione Bruno Kessler -- ES Unit
  • University of Southampton
  • Technical University of Graz
  • University of Paderborn